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In response to USB2 physical layer interface transceivers(PHY)It is transformed into high-speed mode and the differential data line of the PHY is capacitively coupled to the one or more components of high-speed module
In response to USB2 physical layer interface transceivers(PHY)It is transformed into high-speed mode and the differential data line of the PHY is capacitively coupled to the one or more components of high-speed module
In one embodiment, physical layer interface transceiver (PHY) is configured to be operated according to (USB2) agreement of universal serial bus 2.0.The PHY includes the high-speed module for being configured to exchange data via differential data line during high-speed mode.In response to the PHY one or more components for being arranged to off-state so that these differential data lines to be capacitively coupled to the high-speed module via a group capacitor are switched by least one from chirp Mode change at high-speed mode.
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