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MEMORY TYPE WHICH IS CACHEABLE YET INACCESSIBLE BY SPECULATIVE INSTRUCTIONS

机译:记忆指令尚未可识别的记忆类型

摘要

An improved architectural means to address processor cache attacks based on speculative execution defines a new memory type that is both cacheable and inaccessible by speculation. Speculative execution cannot access and expose a memory location that is speculatively inaccessible. Such mechanisms can disqualify certain sensitive data from being exposed through speculative execution. Data which must be protected at a performance cost may be specifically marked. If the processor is told where secrets are stored in memory and is forbidden from speculating on those memory locations, then the processor will ensure the process trying to access those memory locations is privileged to access those locations before reading and caching them. Such countermeasure is effective against attacks that use speculative execution to leak secrets from a processor cache.
机译:用于解决基于推测执行的处理器缓存攻击的改进体系结构方法,定义了一种新的内存类型,该内存类型可通过推测进行缓存和不可访问。推测执行无法访问和公开推测不可访问的内存位置。这样的机制可以使某些敏感数据失去资格,无法通过推测执行来公开。可能需要以性能成本进行保护的数据可能会被明确标记。如果告诉处理器机密存储在内存中的位置,并且禁止推测这些内存位置,则处理器将确保尝试访问这些内存位置的进程有权在读取和缓存它们之前访问这些位置。这种对策对于使用推测性执行从处理器缓存中泄漏机密的攻击有效。

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