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IC DRAM SOC PACKAGING DRAM AND SOC IN AN IC PACKAGE

机译:IC DRAM SOC包装IC中的DRAM和SOC

摘要

There is provided an integrated circuit package comprising a first memory die, a second memory die, a first substrate and a second substrate, wherein the first memory die has a first set of connecting portions, The first substrate having a first opening and a second opening, the first substrate also having a first opening and a second opening, the first substrate having a first opening and a second opening, A third set of connection portions connected to the first set of connection portions of the second memory die and a fourth set of connection portions connected to the second set of connection portions of the second memory die through the second opening, A first integrated circuit is disposed on the substrate. A first substrate is coupled to the second substrate such that a first integrated circuit is disposed between the first substrate and the second substrate.
机译:提供了一种集成电路封装,其包括第一存储器管芯,第二存储器管芯,第一基板和第二基板,其中第一存储器管芯具有第一组连接部,第一基板具有第一开口和第二开口。 ,第一基板还具有第一开口和第二开口,第一基板具有第一开口和第二开口,第三组连接部分,其连接到第二存储管芯的第一组连接部分,第四组是连接部分通过第二开口连接到第二存储器管芯的第二组连接部分。第一集成电路设置在基板上。第一基板耦合到第二基板,使得第一集成电路设置在第一基板和第二基板之间。

著录项

  • 公开/公告号KR101926102B1

    专利类型

  • 公开/公告日2018-12-06

    原文格式PDF

  • 申请/专利权人 마벨 월드 트레이드 리미티드;

    申请/专利号KR20147007564

  • 发明设计人 수타르드자 세하트;

    申请日2012-08-22

  • 分类号H01L25/18;H01L23/498;

  • 国家 KR

  • 入库时间 2022-08-21 11:52:04

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