首页> 外国专利> Supply voltage droop control circuits for reducing or avoiding supply voltage droops

Supply voltage droop control circuits for reducing or avoiding supply voltage droops

机译:电源电压下降控制电路,用于减少或避免电源电压下降

摘要

Supply voltage droop control circuits for reducing or avoiding supply voltage droops are disclosed. The supply voltage drop management circuit includes an interrupt circuit configured to receive event signals generated by the functional circuit. The event signals correspond to operating events occurring in the functional circuit and increase the load current demand on the power supply supplying power to the functional circuit, resulting in a supply voltage droop. The interrupt circuit is configured to generate an interrupt signal in response to the received event signal. The memory includes an operation event-frequency table having entries having a target frequency corresponding to an operation event. Operating the functional circuit at the target frequency reduces the load current demand and supply voltage droop for the power supply. The clock control circuit is configured to generate a clock frequency adjustment signal that causes the clock generator to adjust to the target frequency to access the memory to determine the target frequency to receive the interrupt signal.
机译:公开了用于减少或避免电源电压下降的电源电压下降控制电路。电源电压降管理电路包括中断电路,该中断电路被配置为接收由功能电路生成的事件信号。事件信号对应于在功能电路中发生的操作事件,并且增加了向向功能电路供电的电源的负载电流需求,从而导致电源电压下降。中断电路被配置为响应于接收到的事件信号而产生中断信号。该存储器包括操作事件频率表,该表具有具有与操作事件相对应的目标频率的条目。使功能电路以目标频率工作可减少负载电流需求和电源的电源电压下降。时钟控制电路被配置为生成时钟频率调节信号,该信号使时钟发生器调节至目标频率以访问存储器以确定目标频率以接收中断信号。

著录项

  • 公开/公告号KR20190008234A

    专利类型

  • 公开/公告日2019-01-23

    原文格式PDF

  • 申请/专利权人 퀄컴 인코포레이티드;

    申请/专利号KR20187033051

  • 发明设计人 자파리 자비드;안사리 아민;

    申请日2017-04-13

  • 分类号G06F1/32;G06F1/08;G06F1/28;

  • 国家 KR

  • 入库时间 2022-08-21 11:51:44

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