FPGA A TESTER WITH MIXED PROTOCOL ENGINE IN A FPGA BLOCK

摘要

Automated Test Equipment (ATE) is presented which is capable of performing high speed testing of semiconductor devices. The automated test equipment includes a system controller for controlling the test program, and the system controller is connected to the bus. The tester system further includes a plurality of modules coupled to the bus, each module operable to test a plurality of DUTs. Each of the modules includes a tester processor coupled to the bus and a plurality of configurable blocks communicatively coupled to the tester processor. Each of the configurable blocks is further operable to communicate with an associated DUT and to be programmed with a communication protocol for communicating test data to and from an associated device under test.