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CONVERSION BUFFER FOR DECOUPLING NORMATIVE AND IMPLEMENTATION DATA PATH INTERLEAVING OF VIDEO COEFFICIENT

机译:视频系数规范和实现数据路径交织解耦的转换缓冲区

摘要

A video coder conversion buffer for decoupling a normative coding order and a processing order for video coefficients for intra coding processing of such video coefficients as well as interleaving schemes for the processing order will be discussed. The interleaving schemes include the steps of: receiving a plurality of blocks of quantized residual transformation coefficients corresponding to a coding unit of a video frame in a normative coding order; Interleaving the plurality of blocks of quantized residual transformation coefficients for the normative coding order into a processing order; and performing inverse quantization, inverse transform and intra prediction operations on the plurality of quantized coefficient blocks in the processing order.
机译:将讨论用于解耦用于视频系数的规范编码次序和视频系数的处理次序的视频译码器转换缓冲器,以用于此类视频系数的帧内编码处理以及用于该处理次序的交织方案。交织方案包括以下步骤:以规范编码顺序接收与视频帧的编码单位相对应的多个量化残差变换系数块;将针对规范编码顺序的多个量化残差变换系数块交织为处理顺序;并以所述处理顺序对所述多个量化系数块进行逆量化,逆变换和帧内预测操作。

著录项

  • 公开/公告号DE112017005664T5

    专利类型

  • 公开/公告日2019-08-22

    原文格式PDF

  • 申请/专利权人 INTEL CORPORATION;

    申请/专利号DE20171105664T

  • 发明设计人 WEN TANG;IOLE MOCCAGATTA;

    申请日2017-10-09

  • 分类号H04N19/124;H04N19/176;H04N19/186;H04N19/136;

  • 国家 DE

  • 入库时间 2022-08-21 11:44:59

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