Verification of hardware design for an integrated circuit that implements a functon that is polynomial in one or more input variables

• 1. 对实现在一个或多个输入变量中为多项式的函数的集成电路的硬件设计的验证 [P] . 中国专利： CN111832235A . 2020-10-27
• 2. 对用于实现整数除法的集成电路硬件设计的形式验证 [P] . 中国专利： CN108334306A . 2018-07-27
• 3. VERIFICATION OF HARDWARE DESIGN FOR INTEGRATED CIRCUIT IMPLEMENTING POLYNOMIAL INPUT VARIABLE FUNCTION [P] . US2021350057A1 . 2021-11-11

  机译： 实现多项式输入变量功能的集成电路硬件设计验证

• 4. Verification of Hardware Design for Integrated Circuit Implementing Polynomial Input Variable Function [P] . 美国专利： US2020327270A1 . 2020-10-15

  机译： 实现多项式输入变量函数的集成电路的硬件设计验证

• 5. Formal verification of integrated circuit hardware designs to implement integer division [P] . 美国专利： US10796052B2 . 2020-10-06

  机译： 正式验证集成电路硬件设计以实现整数除法

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