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Disaggregated computing architecture using device pass-through wherein independent physical address spaces between systems nodes are implemented in a single execution environment
Disaggregated computing architecture using device pass-through wherein independent physical address spaces between systems nodes are implemented in a single execution environment
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机译:使用设备直通的分类计算架构,其中系统节点之间的独立物理地址空间在单个执行环境中实现
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摘要
The present disclosure relates to a disaggregated computing architecture comprising: a first compute node (302) comprising an interconnect interface (310); an accelerator node (304) comprising a physical device (402); and an interconnection network (308) linking the first compute node (302) and the accelerator node (304), wherein: the first compute node (302) executes a host operating system (410) and instantiates a first virtual machine (VM) executing a guest device driver (406) for driving the physical device; one or more input registers of the physical device are accessible via a first uniform physical address range (upa_a_devctl) of the interconnection network (308); and the interconnect interface (310) of the first compute node (302) is configured to map a host physical address range (hpa_c_devctl) of the host operating system (410) to the first uniform physical address range (upa_a_devctl).
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