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Large height tree-like sub 30nm vias to reduce conductive material re-deposition for sub 60nm MRAM devices

机译:大高度的树状30纳米以下通孔可减少60纳米以下MRAM器件的导电材料重新沉积

摘要

A stack of connecting metal vias is formed on a bottom electrode by repeating steps of depositing a conductive via layer, patterning and trimming the conductive via layer to form a sub 30 nm conductive via, encapsulating the conductive via with a dielectric layer, and exposing a top surface of the conductive via. A MTJ stack is deposited on the encapsulated via stack. A top electrode layer is deposited on the MTJ stack and patterned and trimmed to form a sub 60 nm hard mask. The MTJ stack is etched using the hard mask to form an MTJ device and over etched into the encapsulation layers but not into the bottom electrode wherein metal re-deposition material is formed on sidewalls of the encapsulation layers underlying the MTJ device and not on sidewalls of a barrier layer of the MTJ device.
机译:通过重复以下步骤在底部电极上形成一堆连接金属通孔:沉积导电通孔层,构图和修整导电通孔层以形成30 nm以下的导电通孔,用介电层封装导电通孔并暴露导电通孔的顶表面。 MTJ堆叠被沉积在封装的通孔堆叠上。顶部电极层沉积在MTJ叠层上,并进行图案化和修整以形成60 nm以下的硬掩模。使用硬掩模刻蚀MTJ叠层以形成MTJ器件,然后刻蚀到封装层中,但不刻蚀到底部电极中,其中金属再沉积材料形成在MTJ器件下方的封装层的侧壁上而不是在其侧壁上MTJ装置的阻挡层。

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