Efficient two-stage object detection scheme for embedded device

摘要

An apparatus comprises a detector and a processor. The processor may be configured to perform a two-stage object detection process utilizing the detector circuit. The detector circuit may be configured to implement a simple detection stage and a complex detection stage. In the simple detection stage, a first type of object detection is applied to each image in a search space and a number of candidates are identified by applying a first non-maximum suppression technique. In the complex detection stage, a second type of object detection is applied to the candidates identified by the simple detection stage.