首页> 外国专利> Square-law companding apparatus based on nonlinear operations on modulated bit-stream

Square-law companding apparatus based on nonlinear operations on modulated bit-stream

机译:基于对调制比特流进行非线性运算的平方律压扩装置

摘要

Disclosed are four independent circuits for compression, expansion, companding, and post-processing of a compressed delta-sigma bit-stream. Compression and expansion are based on the use of a second-order (or higher-order) delta-sigma modulator, and a nonlinear operation on a delta-sigma modulated bit-stream. Depending on application, the disclosed circuits can operate as a stand-alone integrated circuit, or as compandor apparatus as proposed. Inherited low-pass filter can be digital or analog. Thus, the only external analog component to the IC chip could be a capacitor C, when low-frequency analog signal is compressed or expanded.
机译:公开了四个独立的电路,用于压缩,扩展,压扩和压缩的delta-sigma比特流的后处理。压缩和扩展基于使用二阶(或更高阶)的delta-sigma调制器,以及对delta-sigma调制的比特流进行非线性运算。根据应用,所公开的电路可以作为独立的集成电路或所提出的压扩器装置来操作。继承的低通滤波器可以是数字或模拟的。因此,当压缩或扩展低频模拟信号时,IC芯片的唯一外部模拟组件可能是电容器C。

著录项

  • 公开/公告号US10594335B1

    专利类型

  • 公开/公告日2020-03-17

    原文格式PDF

  • 申请/专利权人 DJURO GEORGE ZRILIC;

    申请/专利号US201816350315

  • 发明设计人 DJURO GEORGE ZRILIC;

    申请日2018-11-01

  • 分类号H03M3;

  • 国家 US

  • 入库时间 2022-08-21 11:30:23

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