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Method and apparatus for performing register retiming in the presence of false path timing analysis exceptions
Method and apparatus for performing register retiming in the presence of false path timing analysis exceptions
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机译:在错误路径时序分析异常的情况下执行寄存器重定时的方法和装置
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摘要
A method for designing a system on a target device includes identifying a timing exception for a portion of a signal path. An area on the target device that includes components affected by the timing exception. Register retiming is performed where pipeline registers are added at boundaries of the area.
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