首页> 外国专利> Method and apparatus for performing register retiming in the presence of false path timing analysis exceptions

Method and apparatus for performing register retiming in the presence of false path timing analysis exceptions

机译:在错误路径时序分析异常的情况下执行寄存器重定时的方法和装置

摘要

A method for designing a system on a target device includes identifying a timing exception for a portion of a signal path. An area on the target device that includes components affected by the timing exception. Register retiming is performed where pipeline registers are added at boundaries of the area.
机译:一种用于在目标设备上设计系统的方法,包括识别一部分信号路径的时序异常。目标设备上包含受时序异常影响的组件的区域。在区域边界添加流水线寄存器的地方执行寄存器重定时。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号