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Method, design program, and design apparatus of a high level synthesis process of a circuit
Method, design program, and design apparatus of a high level synthesis process of a circuit
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机译:电路的高级综合过程的方法,设计程序和设计设备
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摘要
A design method including a high level synthesis process that has (1) generating a hardware description of a circuit and high level synthesis report information from a source code based on a high level synthesis constraint, the hardware description describing a circuit including a plurality of stages and inter-stage registers; (2) determining a bypass stage selection pattern based on bypass constraint information including a constraint condition related to a bypass of the inter-stage register and the high level synthesis report information, the bypass stage selection pattern including a plurality of patterns each pattern having a combination of stages of inter-stage registers for which bypass setting is performed among stages of a bypass setting-capable inter-stage registers; and (3) generating bypass report information based on the bypass stage selection pattern, the bypass report information including combination information of the inter-stage registers for which the bypass is performed setting corresponding to a predetermined priority condition.
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