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System and method for PAM-4 transmitter bit equalization for improved channel performance beyond 32 Gbps
System and method for PAM-4 transmitter bit equalization for improved channel performance beyond 32 Gbps
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机译:用于PAM-4发射机位均衡的系统和方法,可改善超过32 Gbps的信道性能
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摘要
A serial data channel includes a transmitter that encodes serial data using a quaternary PAM-4 scheme, wherein the four PAM-4 signal levels include two balanced pairs of differential signal levels. The channel includes a de-emphasis circuit that determines that first and second symbols are in a first PAM-4 state, that a third symbol is in a second PAM-4 state, and provides a first de-emphasis to a voltage level of the second symbol in response to determining that the third symbol is represented as the second state. The de-emphasis circuit further determines that fourth and fifth symbols are in the second state, that a sixth symbol is in the first state, and provides a second de-emphasis to a voltage level of the fifth symbol in response to determining that the sixth symbol is represented as the first state. The first de-emphasis and the second de-emphasis represent different de-emphasis levels.
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