HIGH-LEVEL SYNTHESIS (HLS) METHOD AND APPARATUS TO SPECIFY PIPELINE AND SPATIAL PARALLELISM IN COMPUTER HARDWARE

摘要

A computer-implemented method for synthesizing a digital circuit is disclosed. The method includes receiving producer instructions defining a producer processing thread; generating a producer register-transfer level (RTL) description of the producer processing thread; receiving consumer instructions defining a consumer processing thread; generating a consumer RTL description of the consumer processing thread; and automatically inferring generation of streaming hardware RTL in response to receiving the producer and consumer instructions.