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Corrupt logical block addressing recovery scheme

机译:损坏的逻辑块寻址恢复方案

摘要

Technology for handling page size mismatches when DPL-CLR is performed at multiple levels of a data storage system (for example, RAID level and flash card level). A “corrective DPL” corrects only a portion of the data that would make up a page at the level at which the data is stored (that is, the “initial DPL level”), and, after that, a partially corrected page of data is formed and stored in data storage, with the partially corrected page: (i) having a page size characteristic of the initial DPL; (ii) including the part of the data corrected by the corrective DPL; and (iii) further including other data. In some embodiments, the other data has a pattern that indicates that it is invalid, erroneous data, such that an error message will be returned if this portion of the data is attempted to be read.
机译:在数据存储系统的多个级别(例如RAID级别和闪存卡级别)执行DPL-CLR时,用于处理页面大小的技术不匹配。 “纠正性DPL”仅纠正将构成该页面的一部分数据,即存储数据的级别(即“初始DPL级别”),然后是部分纠正的数据页面形成并存储在数据存储器中,具有部分校正的页面:(i)具有初始DPL的页面大小特征; (ii)包括由纠正性DPL纠正的部分数据; (iii)进一步包括其他数据。在一些实施例中,其他数据具有指示其无效,错误数据的模式,使得如果尝试读取数据的该部分,则将返回错误消息。

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