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METHOD FOR FORMING THREE-DIMENSIONAL INTEGRATED WIRING STRUCTURE AND SEMICONDUCTOR STRUCTURE THEREOF

机译:三维综合布线结构的形成方法及其半导体结构

摘要

Embodiments of methods and structures for forming a 3D integrated wiring structure are disclosed. The method can include forming a dielectric layer in a first substrate; forming a semiconductor structure having a first conductive contact over a front side of the first substrate; and forming a second conductive contact at a backside of the first substrate, wherein the second conductive contact extends through a backside of the dielectric layer and connects to a second end of the first conductive contact. The 3D integrated wiring structure can include a first substrate; a dielectric layer in the first substrate; a semiconductor structure over the front side of the first substrate, having a first conductive contact; and a second conductive contact at the backside of the first substrate, and the second conductive contact extends through a backside of the dielectric layer and connects to the second end of the first conductive contact.
机译:公开了用于形成3D集成布线结构的方法和结构的实施例。该方法可以包括在第一基板中形成电介质层;在第一衬底的前侧上形成具有第一导电接触的半导体结构;在第一基板的背面上形成第二导电触点,其中第二导电触点延伸穿过电介质层的背面并且连接到第一导电触点的第二端。 3D集成布线结构可以包括第一基板;第一基板可以包括第一基板。第一基板中的介电层;在第一基板的正面上方的半导体结构,具有第一导电触点;第二导电触点位于第一基板的背面,第二导电触点延伸穿过介电层的背面并连接至第一导电触点的第二端。

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