首页> 外国专利> PARALLEL DATA FLOW ANALYSIS PROCESSING TO STAGE AUTOMATED VULNERABILITY RESEARCH

PARALLEL DATA FLOW ANALYSIS PROCESSING TO STAGE AUTOMATED VULNERABILITY RESEARCH

机译:阶段数据自动漏洞研究的并行数据流分析处理

摘要

A method for data flow analysis, comprising: obtaining, by a processing circuitry, an execution trace of a software program; dividing, by the processing circuitry, the execution trace into a plurality of sections; generating a plurality of definition-and-usage chains, at least some of the definition-and-usage chains being generated by different processors, at least some of the definition-and-usage chains being generated based on different sections of the execution trace, at least two of the definition-and-usage chains being generated in parallel with one another; combining, by the processing circuitry, the plurality of definition-and-usage chains to produce a data flow graph, the definition-and-usage chains being combined based on information provided by at least one of the processors that are used to generate the definition-and-usage chains, the information indicating one or more unresolved memory locations that are accessed by respective operations corresponding to one or more incomplete usage nodes in the definition-and-usage chains.
机译:一种用于数据流分析的方法,包括:由处理电路获得软件程序的执行轨迹;以及由处理电路将执行轨迹划分为多个部分;生成多个定义和使用链,至少一些定义和使用链是由不同的处理器生成的,至少一些定义和使用链是基于执行跟踪的不同部分生成的,至少两个定义和使用链彼此并行生成;由处理电路组合多个定义和使用链以产生数据流图,基于至少一个用于生成定义的处理器提供的信息来组合定义和使用链。使用和使用链,该信息指示一个或多个未解决的存储位置,这些位置由对应于定义和使用链中一个或多个不完整使用节点的相应操作访问。

著录项

  • 公开/公告号US2020201742A1

    专利类型

  • 公开/公告日2020-06-25

    原文格式PDF

  • 申请/专利权人 RAYTHEON COMPANY;

    申请/专利号US201816228963

  • 发明设计人 ANDREW CALVANO;

    申请日2018-12-21

  • 分类号G06F11/36;G06F9/30;G06F16/901;

  • 国家 US

  • 入库时间 2022-08-21 11:23:50

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