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FAST CURRENT TRANSIENT SUPPRESSION IN A TEST SYSTEM
FAST CURRENT TRANSIENT SUPPRESSION IN A TEST SYSTEM
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机译:测试系统中的快速电流瞬态抑制
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摘要
A current transient suppression circuit includes an inductor electrically connected to a test signal by an input of the inductor, at least one switching device electrically connected to an output of the inductor, and an output of the at least one switching device connected to a shunt path. A method of suppressing current transients in a circuit includes receiving a test signal at an inductor, and when the test signal comprises a current transient, the current transient is received at the inductor, activating at least one switching device electrically connected to the inductor to shunt the current transient away from a device under test.
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