NVRAM SYSTEM MEMORY WITH MEMORY SIDE CACHE THAT FAVORS WRITTEN TO ITEMS AND/OR INCLUDES REGIONS WITH CUSTOMIZED TEMPERATURE INDUCED SPEED SETTINGS

摘要

An apparatus is described. The apparatus includes a memory controller to interface with a memory side cache and an NVRAM system memory. The memory controller has logic circuitry to favor items cached in the memory side cache that are expected to be written to above items cached in the memory side cache that are expected to only be read from.