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STRUCTURE AND METHOD FOR FORMING FULLY-ALIGNED TRENCH WITH AN UP-VIA INTEGRATION SCHEME

机译:带有上整合方案的全对齐沟槽的结构和方法

摘要

A method for manufacturing a semiconductor device includes forming a conductive via extending vertically from a conductive layer, and depositing a first dielectric layer on the conductive layer and on lateral sides the conductive via. In the method, the conductive via is recessed with respect to a top surface of the first dielectric layer. An etch stop layer is deposited on the top surface of the first dielectric layer and on a top surface of the conductive via, and a second dielectric layer is deposited on the etch stop layer. The method also includes removing portions of the etch stop layer and the second dielectric layer to create a plurality of trenches spaced apart from each other. A trench of the plurality of trenches is formed over and exposes at least part of the conductive via, and a conductive material is deposited in the plurality of trenches.
机译:一种用于制造半导体器件的方法,包括形成从导电层垂直延伸的导电通孔,以及在导电层和导电通孔的侧面上沉积第一介电层。在该方法中,导电通孔相对于第一介电层的顶表面凹陷。蚀刻停止层沉积在第一介电层的顶表面上和导电通孔的顶表面上,第二介电层沉积在蚀刻停止层上。该方法还包括去除蚀刻停止层和第二介电层的部分以产生彼此间隔开的多个沟槽。多个沟槽中的沟槽形成在导电通孔的至少一部分上并暴露出至少一部分,并且导电材料沉积在多个沟槽中。

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