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POWER MANAGEMENT COMPONENT FOR MEMORY SUB-SYSTEM POWER CYCLING
POWER MANAGEMENT COMPONENT FOR MEMORY SUB-SYSTEM POWER CYCLING
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机译:内存子系统电源循环的电源管理组件
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摘要
A memory sub-system comprises a power management component comprising a plurality of regulators configured to output respective operating voltages for the memory sub-system. The power management component comprises a power management integrated circuit (PMIC) and is configured to monitor voltage levels of the plurality of regulators and prevent an event of the memory sub-system from occurring until the monitored voltage levels of a set of the plurality of regulators are determined to have reached respective threshold voltage levels.
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