Information processing apparatus, multithread matrix operation method, and multithread matrix operation program

摘要

An information processing apparatus includes a memory; and a processor. The processor is configured to execute partitioning a predetermined matrix whose values of elements are to be generated by a matrix operation, into a predetermined number of first submatrices whose dimension in at least one of a row direction and a column direction is a multiple of a block size corresponding to a number of registers used for the matrix operation, and into the predetermined number of second submatrices that are different from the predetermined number of the first submatrices; and assigning a matrix operation to generate values of elements of each of the predetermined number of the first submatrices, and a matrix operation to generate values of elements of each of the predetermined number of the second submatrices, to each of the predetermined number of threads.