DUAL-MODE ERROR DETECTION MEMORY AND DUAL-MODE ERROR DETECTION METHOD

摘要

A dual-mode error detection memory, comprising an instruction processing module, a storage module, a control signal module, an encoding module, and a decoding module, wherein an error correction code switch flag is provided inside the instruction processing module, the error correction code switch flag has two states of 0 and 1, 0 represents selection of a parity check code, and 1 represents selection of an extended Hamming code; the control signal module controls, according to a control signal sent by the instruction processing module, the storage module to perform a storage or reading operation, and further feeds a completion signal back to the instruction processing module; the encoding module encodes a logical word input by the instruction processing module, and the decoding module reads a physical word from the storage module to perform debugging or error correction to generate an error correction code. According to the apparatus, parity check and extended Hamming codes are introduced at the same time, and switching between two modes is achieved by using an error correction code switch flag, so that the error correction rate is increased while the use requirement is met, and frequent device restart is avoided.