The present invention relates to a hall sensor fault compensation circuit device and a method thereof in a BLDC motor, and more specifically, as a hall sensor fault compensation circuit device in a BLDC motor, three hall sensors from a motor controller that controls driving of the BLDC motor. A clock pulse generating circuit which receives two Hall sensor signals which are normally operated and generates and outputs a clock signal for generating a compensation signal of the fault Hall sensor; And a compensation signal generator configured to receive a clock signal received from the clock pulse generation circuit and a hall sensor signal of two normally operated hall sensor signals and generate and output a compensation signal of a faulty hall sensor. It is characterized by tops. According to the hall sensor failure compensation circuit device and method in the BLDC motor proposed in the present invention, two of the three hall sensors that detect the position information of the rotor required for driving the BLDC motor operate normally when the fault occurs. A clock pulse generating circuit that generates a clock signal for generating a compensation signal of a faulty hall sensor using a hall sensor signal, and a Hall sensor having a fast phase among the clock signal received from the clock pulse generator circuit and two Hall sensor signals in normal operation By constructing a compensation signal generator that receives the signal and generates a compensation signal for the fault hall sensor, the fault hall sensor signal is generated and compensated, but the charging and discharging rate of the capacitor is increased through increased duty, thereby reducing the sensitivity of the circuit. Accordingly, it is possible to further improve the reliability of the fault hall sensor signal generated even for a frequency change occurring in a transient section in which the rotational speed of the motor changes. In addition, according to the Hall sensor fault compensation circuit device and its method in the BLDC motor proposed in the present invention, a clock pulse generation circuit having a redundant decoder, a redundant full-pass filter and an AND gate, and a D-flip-flop By further configuring the implemented compensation signal generator, the sensitivity of the circuit is further reduced to enable accurate compensation of the Hall sensor error in the motor system to which the variable speed BLDC motor is applied, and thus the motor drive system with stable control of the BLDC motor. It can be made to further improve the operational reliability of.
展开▼
