A device for generating verification vector for verifying circuit design circuit design system including the same and their reinforcement learning method

摘要

An apparatus for verifying a circuit design including a first circuit block and a second circuit block according to an aspect of the technical idea of the present disclosure includes the first circuit block generated by inputting a first test vector to the first circuit block. A first verification vector is determined by performing reinforcement learning through a neural network operation based on a coverage corresponding to the first test vector determined based on a state transition, and the first verification vector is generated. And a verification vector generator configured to perform design verification on the first circuit block using the first verification vector.