A memory controller has a generator circuit which is designed to generate a predetermined data pattern, an address input and a memory interface circuit. The memory interface circuit is designed to write the predefined data pattern into a memory at an address specified in the address input. The memory interface circuit is also designed to read a stored data pattern at the address from the memory. The memory controller furthermore has an integrity checking circuit which is designed to compare the predefined data pattern and the stored data pattern and to identify an error in the memory based on the comparison.
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