An oscillator with improved frequency stability

摘要

Oscillator having input (In) and output (Out) terminals comprising a first signal delay circuit 120 having a first voltage response characteristic and associated first propagation delay, and a second signal delay circuit 106 having a second voltage response inversely correlated to first voltage response characteristic, and coupled to the first delay circuit 102 to provide an associated second propagation delay. The first and second propagation delays are temporarily matched to generate an oscillating signal at a predetermined frequency. The first signal delay circuit may comprise at least two series coupled inverters, (104a,b) each coupled to a first/second supply voltage (Vdd, Vss), and form a part of a ring oscillator. The second signal delay circuit may comprise at least one RC (resistor/capacitor) network. The oscillator may further include a buffer stage 104f. The inverters may be optimised for a predetermined voltage supply range. The first/second voltage (supply) characteristic may be a supply voltage dependency of first/second propagation delay (or frequency v supply voltage characteristic).