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PROCEDE ET DISPOSITIF PERMETTANT DE GENERER UNE HORLOGE LOCALE AU MOYEN DE SIGNAUX AVAL DP ET DM DE BUS SERIEL UNIVERSELRE US
PROCEDE ET DISPOSITIF PERMETTANT DE GENERER UNE HORLOGE LOCALE AU MOYEN DE SIGNAUX AVAL DP ET DM DE BUS SERIEL UNIVERSELRE US
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摘要
A method and device is disclosed for generating a local clock signal CLK1X (172) from Universal Synchronous Bus downstream-received differential signals DM and DP carrying the downstream received bit-serial signal. The method and device does not require the use of a crystal or resonator. Counters (312, 310, 305, 301) are used to determine a number of periods of a free-running high frequency clock signal (164) contained within in a known number of bit periods of the downstream received bit-serial signal (146). The counter values are divided by the known number of bit periods of the received bit-serial signal (146) to determine a bit period of the received bit-serial signal (146). The local clock signal (172) may be phase-locked with the received bit serial signal (146). The local clock period is updated on an ongoing manner by downstream known received traffic.
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