RÉGULATEUR DE FAIBLE PERTE DE NIVEAU VERROUILLÉ EN PHASE DE FAÇON NUMÉRIQUE

摘要

Described is an apparatus which comprises: a first oscillator to generate a first clock signal a second oscillator to generate a second clock signal; a phase frequency detector to detect phase difference between the first and second clock signals, and to generate a phase difference; and an output stage, coupled to a load, to generate a power supply for the load according to the phase difference.