首页> 外国专利> SYSTÈMES ET PROCÉDÉS PERMETTANT D'ATTÉNUER DES DÉFAUTS DANS UNE LOGIQUE COMBINATOIRE

SYSTÈMES ET PROCÉDÉS PERMETTANT D'ATTÉNUER DES DÉFAUTS DANS UNE LOGIQUE COMBINATOIRE

摘要

Methods, systems, and apparatus for detecting single event effects. The system includes a first-modulus digital logic unit and a second-modulus digital logic unit each configured to reduce one or more operands by a respective modulus, apply an arithmetic compute logic to the reduced operands to produce a respective compute output, and reduce the respective compute output by their respective modulus. The system includes a kernel digital logic unit configured to apply the arithmetic compute logic to the operands to produce a kernel compute output, output the kernel compute output reduced by the first modulus, and output the kernel compute output reduced by the second modulus. The system includes a detector configured to detect a single event effect based on the reduced first compute output, the kernel compute output reduced by the first modulus, the reduced second compute output, and the kernel compute output reduced by the second modulus.

著录项

  • 公开/公告号EP3513293A4

    专利类型

  • 公开/公告日2020.05.20

    原文格式PDF

  • 申请/专利权人 University of Southern California;

    申请/专利号EP17851658

  • 发明设计人 SIKA, Michel;

    申请日2017.09.15

  • 分类号

  • 国家 EP

  • 入库时间 2022-08-21 10:53:11

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