This brief presents a hardware design to achievehigh-throughput QR decomposition, using Givens Rotation Method. It utilizes a new two-dimensional systolic array architecturewith pipelined processing elements, which are based on the COordinate Rotation DIgital Computer (CORDIC) algorithm. CORDIC computes vector rotations through shifts and additions.This approach allows a continuous computation of QR factorizations with simple hardware. A fixed-point FPGA architecture for 4 x 4 matrices has been optimized by balancing the number of CORDIC iterations with the final error. As a result, compared to other previous proposals for FPGA, our design achieves at least 50% more throughput, and much less resource utilization.
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机译:本摘要介绍了一种使用Givens旋转方法实现高通量QR分解的硬件设计。它利用具有流水线处理元素的新的二维脉动阵列结构,该结构基于坐标旋转数字计算机(CORDIC)算法。 CORDIC通过移位和加法来计算矢量旋转,这种方法允许使用简单的硬件连续计算QR因式分解。通过平衡CORDIC迭代次数与最终误差,优化了4 x 4矩阵的定点FPGA体系结构。结果,与其他先前针对FPGA的建议相比,我们的设计实现了至少50%的吞吐量提高,并且资源利用率大大降低。
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