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Efficient Modelling of Embedded Software Systems and Their Formal Verification

机译:嵌入式软件系统的高效建模及其形式验证

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摘要

We propose vectors of finite-state machines whose transitions are labeled by formulas of a common-sense logic as the modelling tool for embedded systems software. We have previously shown that this methodology is very efficient in producing succinct and clear models (e.g., in contrast to plain finite-state machines, Petri nets, or Behavior Trees).We show that we can capture requirements precisely and that we can simulate and validate the models. We can, therefore, directly apply Model- Driven Engineering and deploy the models into software for diverse platforms with full traceability of requirements. Moreover, the sequential semantics of our vector of finite-state machines enables model-checking, formally establishing the correctness of the model. Finally, our approach facilitates systematic Failure Modes and Effects Analysis (FMEA) for diverse target platforms. We demonstrate the effectiveness of our methodology with several examples widely discussed in the software engineering literature and compare this with other approaches, showing that we can prove more properties, and that some claims about verification in such approaches have been exaggerated or are incomplete.
机译:我们提出了有限状态机的向量,这些向量的转移由常识逻辑的公式标记,作为嵌入式系统软件的建模工具。之前我们已经证明了这种方法在生成简洁明了的模型方面非常有效(例如,与普通有限状态机,Petri网或行为树相反)。我们证明了我们可以精确地捕获需求,并且可以模拟和验证模型。因此,我们可以直接应用“模型驱动工程”并将模型部署到具有完全可追溯性要求的,适用于各种平台的软件中。此外,我们的有限状态机向量的顺序语义可以进行模型检查,从而正式确定模型的正确性。最后,我们的方法有助于针对各种目标平台进行系统的故障模式和影响分析(FMEA)。我们通过在软件工程文献中广泛讨论的几个示例来证明我们的方法的有效性,并将其与其他方法进行比较,表明我们可以证明更多的属性,并且关于这种方法中的验证的某些主张被夸大或不完整。

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