Analysis of Pulse Stuffing Multiplexers via Digital Computer Simulation with Application to the AN/GSC-24 Asynchronous TDM.

摘要

Results of computer simulation of asynchronous pulse stuffing multiplexers are presented. Analysis and simulation are given for output jitter, characterized by a continuous change in the output frequency as the demultiplexer attempts to smooth the effects of deleting stuff (dummy) bits from the received signal. The effect of jitter is shown on terminal equipment where narrowband bit synchronizers cannot track the jitter and will experience degraded performance including periodic loss of bit synchronization. Emphasis is placed on the AN/GSC-24 ATDM because of numerous interface modems which have arisen due to pulse stuffing jitter. Results of GSC-24 simulation are compared with actual test results. Simulation is shown to be effective in predicting performance for a variety of port and multiplex configurations. (Author)