The invention provides a CMOS CT detector design with high linearity, quantum-limited noise, good scalability, high fill factor with a single CMOS chip utilizing synchronous partial quantization. The CMOS CT detector includes a pixel array, digital column buses, analog column buses, column processing circuits, a shift register, a control signal generation circuit, and a reference generation circuit, and implements a synchronous partial quantization scheme with reset, integration and analog readout phases. Each pixel of the pixel array further includes a photodiode; an integration capacitor; an OPAMP; a reset switch; a comparator; a 1-bit dynamic random-access-memory (DRAM) cell; a circuit block for enabling subtraction of a substantially fixed amount of charge from the integrated photocharge if the integrated photovoltage increases beyond the reference voltage; an integration node; an analog buffer; and a switch coupled between the output of the DRAM cell and the digital column bus. The inclusion of a level-shifter and a current front-end improves the linearity of the detector.
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