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机译:一种基于高噪声、高能效的45nm GPDK技术,用于混合信号系统的高稳定电流平衡逻辑(HCBL)和动态逻辑电路
Department of ECE Pondicherry University Pondicherry Engineering College;
Current balanced logic; Dynamic logic; Noise immunity; Pseudo-NMOS;
机译:A Highly Reliable, Dynamic Logic-Based Hybrid MTJ/CMOS Magnetic Full Adder for High-Performance and Low-Power Application
机译:A self-control leakage-suppression block for low-power high-efficient static logic circuit design in 22 nm CMOS process
机译:Fuzzy Logic Decoupling Control of Real and Reactive Power in Grid-Connected Photovoltaic Power System based a Seven Levels Inverter Linked to a Three-Stage Boost Circuit