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A Method of Test Generation for Acyclic Sequential Circuits Using Single Stuck-at Fault Combinational ATPG

机译:一种基于单卡住故障组合ATPG的非循环时序电路测试生成方法

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摘要

A test generation method with time-expansion model can achieve high fault efficiency for acyclic sequential circuits, which can be obtained by partial scan design. This method, however, requires combinational test pattern generation algorithm that can deal with multiple stuck-at faults, even if the target faults are single stuck-at faults. In this paper, we propose a test generation method for acyclic sequential circuits with a circuit model, called MS-model, which can express multiple stuck-at faults in time-expansion model as single stuck-at faults. Our procedure can generate test sequences for acyclic sequential circuits with just combinational test pattern generation algorithm for single stuck-at faults. Experimental results show that test sequences for acyclic sequential circuits with high fault efficiency are generated in small computational effort.
机译:采用时间扩展模型的测试生成方法可以对非循环时序电路实现较高的故障效率,这可以通过局部扫描设计获得。然而,这种方法需要组合测试码生成算法,该算法可以处理多个卡住故障,即使目标故障是单个卡住故障。在本文中,我们提出了一种非循环时序电路的测试生成方法,称为MS模型,该方法可以将时间扩展模型中的多个卡顿故障表示为单个卡顿故障。我们的程序可以为非循环时序电路生成测试序列,只需针对单个卡住故障的组合测试码生成算法即可。实验结果表明,只需少量计算即可生成具有高故障效率的非环时序电路的测试序列。

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