Observation of slip dislocations in (100) silicon wafers after BF2ion implantation and rapid thermal annealing

摘要

The generation of slip dislocations in BF2ionhyphen;implanted, 100hyphen;mmhyphen;diam silicon wafers during rapid thermal annealing is investigated. Whole wafer xhyphen;ray topography shows that annealing at 1150thinsp;deg;C causes slip to initiate randomly at positions of maximum resolved stress at the wafer edges and over scribe marks made on the back surface prior to annealing. Lowering the annealing temperature by 20thinsp;deg;C, which corresponds to decreasing the silicon yield stress by less than 106dynthinsp;cmminus;2, prevents slip from occurring and allows sufficient removal of implantationhyphen;induced defects from which junction diodes with good currenthyphen;voltage characteristics are fabricated.