A new circuit model for tunneling related trapping at insulatorhyphen;semiconductor interfaces in accumulation

摘要

We have investigated the effects due to the capture of tunneling electrons by interface traps to the measured capacitance,Cm, and equivalent series resistance,Rm, of insulatorhyphen;semiconductor interfaces in metalhyphen;insulatorhyphen;semiconductor (MIS) capacitors in accumulation. A new circuit model taking into account the capture of tunneling electrons by interface traps is derived. Theoretical and experimental results of Si3N4/Si/GaAs, Si3N4/epihyphen;Si, and SiO2/epihyphen;Si MIS capacitors are compared. The Si, Si3N4, and SiO2layers investigated were depositedinsituby electron cyclotron resonance generated plasma in an ultrahigh vacuum chemical vapor deposition chamber. Frequency dispersion of bothCmandRmcan be adequately explained by the new circuit model.