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Modified Saddle MOSFETs for Sub-50 nm DRAM Technology

机译:Modified Saddle MOSFETs for Sub-50 nm DRAM Technology

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摘要

A new MOS device (called modified Saddle MOSFET) with recess channel and side-gate was proposed, and key features of the device were characterized through 3-dimensional device simulation for the first time. The Saddle MOSFET structure was modified to have smaller GIDL and lower source/drain to gate overlap capacitance. It was about 21 lower gate capacitance and lower I{sub}(off) by two orders of magnitude than Saddle device while keeping nearly same I{sub}(on) current. In addition, the proposed MOSFETs shown less threshold voltage (V{sub}(th)) sensitivity with the corner shape than conventional recess channel devices, and shown lower gate delay time (CV/I) by -30 than the conventional devices while keeping nearly the same I{sub}(off).

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