An asymmetric MOSFET (with no LDD on the source side) is simulated on bulk-Si using a device simulator (SILVACO). We have introduced not only a mesa structure to reduce the drain influence on the source but also an asymmetric LDD structure which does not have LDD at the source region to increase drive current (ION)- First of all, we have simulated to compare the characteristics between asymmetric and symmetric MOSFETs. Basically, both asymmetric and symmetric MOSFETs have an n-type channel (25 nm) and the same physical parameters. According to the simulation results, the 25 nm asymmetric MOSFET has the drive current (I{sub}(ON)) of 668μA/μm at V{sub}G-V{sub}(TH)=0.8 V and V{sub}(DS)=1 V. It has off current (I{sub}(OFF)) of 0.475 μA/μm at V{sub}G-V{sub}(TH)= -0.2 V and V{sub}(DS)=1 V. The threshold voltage is 0.1 V at V{sub}(DS)=0.05 V and sub-threshold swing SS is 100 mV/dec and DIBL is 120 mV/V. When we compare this with the 25 nm symmetric MOSFET, the asymmetric MOSFET shows bfetter device performances.
展开▼
