...
首页> 外文期刊>IEEE Transactions on Microwave Theory and Techniques >A Low-Power Hybrid-Integrated 40-Gb/s Optical Receiver in Silicon
【24h】

A Low-Power Hybrid-Integrated 40-Gb/s Optical Receiver in Silicon

机译:A Low-Power Hybrid-Integrated 40-Gb/s Optical Receiver in Silicon

获取原文
获取原文并翻译 | 示例

摘要

A low-power hybrid-integrated 40-Gb/s optical receiver is reported. The receiver consists of a broadband photodiode fabricated in a 0.18-mu m Ge-on-SOI process packaged with an mm-wave electronic chip fabricated in a 0.13-mu m SiGe BiCMOS process. The electronic chip consists of a low-noise trans-impedance amplifier front-end, a three-stage Cherry-Hooper limiting amplifier, an output driver, and an offset cancellation network. The effect of the bond-wires, as the interface between the photonic and electronic chips, on the overall performance of the receiver is studied. The sensitivity level remains better than -11.0 dBm (bit error rate = 10(-12)) with bond-wire length variation from 300 to 600 mu m enabling a low-cost and reliable packaging solution for such optical receivers. The measured eye diagram has a 100-mV(pp) single-ended opening at 40 Gb/s. The receiver consumes 77 mW.

著录项

获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号