Effects of coercive voltage and charge injection on memory windows of metal-ferroelectric-semiconductor and metal-ferroelectric-insulator-semiconductor gate structures

摘要

We have prepared Pt/SrBi_(2)Ta_(2)O_(9) (SBT)/Si metal-ferroelectric-semiconductor (MFS) and Pt/SBT/Y_(2)O_(3)/Si metal-ferroelectric-insulator-semiconductor (MFIS) ferroelectric gate structures and investigated the changes in memory window with different thickness of SBT and Y_(2)O_(3) in the MFS and MFIS. As a result, it is found that the memory window increases with increasing thickness of SBT and decreasing thickness of Y_(2)O_(3). The experimental and theoretical analysis reveals that the memory window equals to the difference between the effective coercive voltage (2V_(c)) applied to the ferroelectric film and the flat band voltage shift due to charge injection (V_(ci)). Increasing the thickness of SBT, the 2V_(c) seems to be saturated at higher voltage, whereas the V_(ci) starts to increase exponentially at the higher gate voltage. In contrast, the V_(ci) decreases with decreasing thickness of Y_(2)O_(3), resulting in the enhancement of the memory window due to the reduction of charge injection.