Timehyphen;dependent lateral charge separation along a dielectric interface can induce parasitic Fieldhyphen;Effect Transistor (FET) leakage within integrated circuits. For the bipolar technology investigated, physical analysis techniques revealed that lateral charge separation occurred along the silicon nitridehyphen;tohyphen;sputtered quartz interface. The induced parasitichyphen;FET leakage in the silicon was observed using electron beamhyphen;induced current techniques. The parasitichyphen;FET leakage can be prevented by either a field shield or a guardring. The lateral charge separation that occurred along the thermal oxidehyphen;tohyphen;silicon nitride interface did not induce parasitichyphen;FET leakage but lead to an increase in the commonhyphen;emitter current gain of the lateralhyphen;PNPtransistor. This instability was eliminated by depositing a phosphosilicate glass layer on top of the thermal oxide. Evidence that eliminated hot carrier injection as the origin of the parasitichyphen;FET leakage is presented. Process and layout effects on the parasitichyphen;FET leakage were also investigated.
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