Task preemption is a critical mechanism for building an effective multi-tasking environment on dynamically reconfigurable processors. When being preempted, necessary state information in register files and internal memories must be correctly preserved in order for the task to be resumed later. This paper aims at studying an efficient method for extracting and restoring state data of a hardware task with low latency penalty. Specifically, we develop algorithms to insert and refine preemption states subject to user-specified preemption latency and resource overhead constraints. Modification steps are incorporated into the system design flow. Performance degradation is minimized by allowing preemption only at predefined points where demanded resources are small. The evaluation result using a model based on NEC Electronics DRP-1 shows that the proposed method could generate a list of appropriate preemption points satisfying a given preemption latency with the reasonable hardware overhead (from 6 to 14).
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