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首页> 外文期刊>電子情報通信学会技術研究報告. シリコン材料·デバイス. Silicon Devices and Materials >Bias acceleration of drain resistance increase in InP-based HEMTs and lifetime enhancement by low-bias design of ICs
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Bias acceleration of drain resistance increase in InP-based HEMTs and lifetime enhancement by low-bias design of ICs

机译:Bias acceleration of drain resistance increase in InP-based HEMTs and lifetime enhancement by low-bias design of ICs

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摘要

Bias acceleration of InP HEMTs degradation was examined and drain resistance increase dependence on gate-drain bias was clarified. It was found that both a strong electric field and a high current density, when impact ionization rate was high, enhance the R{sub}d increase. By reducing surface contamination in the fabrication process, which we speculated to be responsible for donor inactivation and drain resistance increase, we were able to improve device lifetime and thereby achieve long-lifetime HEMTs and 40-Gbit/s InP HEMT-ICs. In addition reducing operating bias resulted in the T-FFs lifetime of over 1 × 10{sup}7 hours at 100℃, indicating that this is the key to achieving high IC reliability.
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