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Analysis and Design of High-Efficiency Parallel-Circuit Class-E/F Power Amplifier

机译:高效并联电路E/F类功率放大器分析与设计

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摘要

In this paper, a single-ended parallel-circuit (PC) class-E/F power amplifier (PA) is proposed. For a particular case of the PC class-E/F-3 mode with 50 duty cycle, its analytical derivation of the idealized waveforms, optimum values of the load network components, and significant figure-of-merit of PA is elaborated and verified. The ideal optimum voltage and current waveforms do not overlap simultaneously, which presents a theoretical drain efficiency of 100. In addition, compared with other switch-mode PAs, the proposed structure successfully improves the performance in the peak drain voltage (V-max), maximum operating frequency (f(max)), and power output capability (c(p)). Hence, it provides a good choice for high-efficiency mobile/wireless communication systems in the future. The analysis is validated by simulation and design of a test board. The measurement result shows the output power of 40.4 dBm, drain efficiency of 83.9, power-added efficiency of 77.2, and power gain of 10.4 dB at an operating frequency of 2.6 GHz.
机译:该文提出一种单端并联电路(PC)E/F类功率放大器(PA)。针对占空比为50%的PC E/F-3类模式,详细阐述并验证了其理想化波形、负载网络分量的最佳值和PA的有效品质因数的分析推导。理想的最佳电压和电流波形不会同时重叠,因此理论漏极效率为100%。此外,与其他开关模式PA相比,所提结构成功地提高了峰值漏极电压(V-max)、最大工作频率(f(max))和功率输出能力(c(p))的性能。因此,它为未来的高效移动/无线通信系统提供了良好的选择。通过仿真和设计测试板来验证分析。测量结果显示,在2.6 GHz工作频率下,输出功率为40.4 dBm,漏极效率为83.9%,功率附加效率为77.2%,功率增益为10.4 dB。

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