A ferroelectric random access memory (FeRAM) based nonvolatile 8-context dynamically programmable gate array (DPGA) enables low-cost field programmable systems by the elimination of off-chip nonvolatile memories and multi-context architecture. Since read and program sequences of configuration data loading on the DPGA are securely protected, unauthorized users cannot access to the configuration data. The associated configuration memory consists of SRAM-based 6-transistor and 4-ferroelectric capacitor cells. The developed configuration memory achieves access time comparable to standard SRAM, which is 20 times faster than conventional ferroelectric memory; furthermore, it features nondestructive read operations and stable data recall scheme. The prototype nonvolatile DPGA is fabricated on 0.35μm CMOS with FeRAM technology, and the implementation of Data Encryption Standard (DES) encryption/decryption scheme presents comparable performance with standard CMOS devices. The nonvolatile storage of configuration memory is verified for the power supply voltage of 1.5V, which is the lowest operation voltage observed in a PZT based ferroelectric memories.
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