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A robust array architecture of a capacitorless MISS tunnel-diode memory

机译:A robust array architecture of a capacitorless MISS tunnel-diode memory

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摘要

With the aim of applying a MISS tunnel-diode cell to a high-density RAM, we studied its problems and developed three circuit techniques to solve them. The first, a standby-voltage control scheme reduces background currents and suppresses the degeneration of the signal current from 75 to 15. The second, a hierarchical bit-line structure increases the number of memory cells in a bit-line and reduces the number of sense amplifiers. The third, a twin-dummy-cell technique generates a proper reference signal to discriminate read currents. These techniques enable a high-density RAM to use the capacitor-less MISS-diode memory cell, whose effective cell area factor is 6.
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