A new logic-in-memory VLSI for synchronous sequential circuits is proposed to localize data transfer between combinational logic circuits and storage elements. The combination of a locally computable state assignment and a dynamic storage-based pass-transistor network, in which state registers are distributed over a combinational circuit, makes it possible to realize compact sequential circuits with local data transfer. As a typical application, a modulo-4 counter based on one-hot coding is designed by using the proposed circuit. Its performance is superior to that of corresponding binary CMOS implementation under a 0.35-μm CMOS technology.
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